Verilog HDL is a hardware description language (HDL: Hardware DiscripTIon Language). Verilog HDL language is a language that describes the structure and behavior of digital system hardware in text form. It can represent logic circuit diagrams, logical expressions, and Represents the logical functions performed by the digital logic system.
Verilog HDL and VHDL are the two most popular hardware description languages ​​in the world, all developed in the mid-1980s. The former was developed by Gateway Design AutomaTIon, which was acquired by Cadence in 1989. Both HDLs are IEEE standards
The Verilog HDL language learning use is a piece of description language developed on the basis of the widest C language. It was first created by GDA (Gateway Design AutomaTIon)'s PhilMoorby in late 1983. At the beginning, only one simulation and verification was designed. Tools, and then developed related fault simulation and timing analysis tools. In 1985, Moorby launched its third commercial emulator, Verilog-XL, with great success, which enabled Verilog HDL to be quickly promoted. In 1989, CADENCE acquired GDA, making VerilogHDL an exclusive patent for the company. In 1990, CADENCE publicly published Verilog HDL and established an LVI organization to promote Verilog HDL to become the IEEE standard, IEEE Standard 1364-1995.
The most important feature of Verilog HDL is that it is easy to learn and use. If you have programming experience in C language, you can learn and master it quickly in a short period of time. Therefore, you can arrange Verilog HDL content in related courses such as ASIC design. Since the HDL language itself is specifically designed for hardware and systems, this arrangement allows learners to gain experience in designing actual circuits at the same time. In contrast, VHDL learning is more difficult. However, the grammar of Verilog HDL is also easy to cause some mistakes for beginners. This should be noted.
Hardware Description Language is a formalized way to describe the language of digital circuits and systems. The digital circuit should be a course that is studied in the second year of the second year of the sophomore year. It is a very important course. At present, the university may focus on the explanation of logic gates and small-scale integrated circuits, and rarely involves HDL. Of course, we can form a digital system through a series of 74 series chips, but when the number of system gates increases, the design becomes very complicated and difficult - but there are still foreigners who use this method to implement 8-bit processors. But to be honest, its cost and energy consumption can only be used to earn eyeball effects, but not much practical significance.
With the development of EDA technology, more is now implemented using CPLD, FPGA, ASIC, etc. Firstly, HDL is used to describe the design idea from abstract to concrete and layer by layer. Finally, EDA tools are used for simulation and synthesis, and converted into gate-level circuit netlists. Then, CPLD/FPGA/ASIC automatic layout and routing tools are used to convert the netlist into concrete. The implementation of the circuit wiring structure (this concept may be difficult for novices, for example, it is like selecting a bunch of applicable 74 chips, and then connecting).
Today's digital systems and digital signal processing are developing very fast. Mastering an HDL is a basic skill of science and engineering college students. The current trend is even more important than mastering microcontrollers. Because we use HDL, we can even write our own microcontroller and implement it on FPGA/ASIC.
The development of hardware description languages ​​has been more than 20 years old. Nowadays, the main language VHDL (Very High Speed ​​Integerated Hardware Description Language) and Verilog HDL (Verilog Hardware Description Language) have adapted to the historical development trend and requirements, and have become the IEEE standard.
In my opinion, the emergence of language is to replace the graphical (component patchwork) design with the language description, and write the functions and ideas we want to implement in the form of language. The work of converting into the actual circuit is given to the EDA tool. This simplifies the work of our design and saves development time. It can also be said that people who don't understand the hardware don't need to know too much about the circuit to start development, which may be more useful for researchers.
Choosing Verilog or VHDL learning, there is a lot of debate on this issue.
This thing seems to be very important, because it is necessary to choose which language to use at the beginning, to compare the pros and cons of the two languages, the use of the situation, etc., in order to learn better later. I only have Verilog, so I don't dare to play the pros and cons of the two. I want to talk about it from another angle.
Both languages ​​are hardware description languages ​​for digital electronic system design and are already IEEE standards. VHDL became the standard in 1987, and Verilog became the standard in 1995. This is because VHDL was developed by the US-based organization, and Verilog is a private property of the company. Why can Verilog become an IEEE standard? It must have its superiority, so Verilog has more vitality.
Both have their common characteristics:
1. Formally abstractly represent the behavior and structure of the circuit;
2. Support the description of the hierarchy and scope in the logic design;
3. It can borrow high-level language and elaborate structure to simplify circuit behavior and structure; it has circuit simulation and verification mechanism to ensure the correctness of design;
4. Support circuit description from high-level to low-level integrated conversion;
5. The hardware description has nothing to do with the implementation process;
6. Facilitate document management;
7. Easy to understand and design reuse - this is very important!
But both have their own characteristics. Verilog HDL has been launched for 20 years, has a wide range of design groups, and mature resources are more abundant than VHDL (but it seems that I have more information on VHDL when I am looking for information, which is related to the current atmosphere). One of Verilog's bigger advantages is that it is very easy to master. As long as there is a programming foundation for C language, it can be mastered in 2 to 3 months in a short period of time and after some practical operations. VHDL design is relatively difficult. This is because VHDL is not very intuitive. It needs to have Ada programming foundation (I don't know what it is, dizzy). It is generally believed that at least half a year of professional training can be mastered.
The current versions of Verilog HDL and VHDL differ in the coverage of behavioral abstraction modeling. It is generally believed that Verilog is slightly worse than VHDL in system level abstraction, and much stronger in terms of gate level switching circuit description.
In the past 10 years, the EDA community has been arguing over which hardware description language to use in digital logic design. Currently, in the United States, the ratio of Verilog and VHDL is 80% and 20% in the field of high-level digital system design; Japan It is similar to Taiwan and the United States; and the development of VHDL in Europe is better. Verilog is used by many IC design companies in China, but VHDL also has a certain market.
Teacher Xia Yuwen recommends that you learn Verilog first, then VHDL. I think so too, only one language is not enough, otherwise there will be problems in communication, and it is also a necessary ability to design digital circuits with schematic methods. Otherwise, it will not be able to eat hard and reach the level of the big cow. .
Some schools in the university will talk about VHDL, but it does not hinder the study of Verilog.
This question may be different for people who have different answers, and the books recommended by each person are different. However, regarding Verilog, Mr. Xia Yuwen is definitely a leading figure in China, and several books I recommend have a certain relationship with him. This is not because I personally have a good relationship with him, but it is true that these books are good. I suggest that you have a paper version of the book, one aspect is to support the hard work of Xia teacher, the other is also easy to read and learn.
(1) Students who have not studied digital circuits are advised to first purchase a digital logic foundation and VERILOG design (2nd edition of the original book) written by STEPHEN BROWN and translated by Xia. This book is available for download in the [Altera FPGA/CPLD Data Edition]. This book can be used as a textbook for digital circuits, as well as Verilog. It is a rare book. Originally, I was preparing to use the book as a textbook to open an elective course at the school this semester. As a result, the leader did not know what reason to wipe the class for the card...
(2) Anyone who has studied digital circuits should have a copy of Verilog HDL Digital Design and Synthesis (Second Edition), edited by Samir Palnitkar and translated by Xia. The original English version of the book is regarded as a classic work of Verilog. The textbooks of postgraduate courses in many universities in the United States, I also read a part of the Chinese version, I think it is still a good book. [Altera FPGA/CPLD data special edition] has two Chinese and English Version of the ebook. There are people on the Internet who are not good at attacking the translation of this book. However, after reading those comments and books, there is a natural conclusion, and rumors will naturally break.
(3) The third one is the VERILOG Digital System Design Tutorial (2nd Edition) edited by Xia. This book is available in the Altera FPGA/CPLD data version. I have read the first version I have not seen. Now this book has been frequently flipped, and it has been very worn out by me. When the book came out, there was no good Verilog book in China. I was asked to buy it for me in Beijing (it was like online bookstores yet). The book is very very good for grammar and practical applications, and it is strongly recommended that everyone read and learn.
The book recommends so much, and some information may be needed. Otherwise, it is a language, there is no actual combat, and it is not easy to have actual feelings. Later, I will also recommend some materials and some chapters of some books, and go to specific places.
While learning the language, I feel that we should learn to use the hardware. After all, we are learning the language in order to design the hardware circuit. In the tutorial version of this site, there are corresponding hardware tools, you can buy the PCB from the site to solder itself, you can also make the corresponding circuit module to learn.
There must be some money on the hardware, and I can't always think that something seems expensive and I can't bear it. In fact, more people now prefer to spend money on games, eating and drinking, and not spending money on learning. I really like students who are looking for ways to learn, buy hardware or do hardware studies. I met such a student, and sometimes I took the initiative to give them hardware to learn. For those students who are inert, I think there may be few teachers who will like it.
Altera's Quartus II, design software.
Mentor Graphics' ModelSim, simulation software, and Altera's software also have corresponding AE versions.
Other comprehensive tools and programming tools can wait until the learning is almost done.
The use of software, I think the most direct way is to look at the manufacturer's Help, followed by the corresponding information in the appendix of the two books mentioned above.
Ten examples of the DE2 board, in the [FPGA and SOPC design tutorial: DE2 practice] The sixth chapter of this book has a Chinese version of the translation, you can find this book in the download area.
Other learning materials or tutorials - I am also prepared to write such a thing, but I have been thinking about whether it should be told from the perspective of programming, hardware application or digital logic. It is because of the bad direction, once the direction is wrong. It will make many people take a detour. I can't afford this responsibility.
In fact, the information is not much, the key is fine, the other is to look for the information must be seen, do not take pride in how much information you have, should be proud of how much information you read.
The process of learning is not the same for everyone. Let me just say a few words with my personal experience.
The first is the use of software, such as the use of QuartusII should be placed before all the learning (classmates who have learned digital circuits, if you have not learned, first learn some basic concepts, learn "Digital Logic Foundation and VERILOG Design" At the beginning, I used the schematic design method to learn to use the software. Then I learned Verilog. I suggest that the examples in the book be done once in the process of learning, and also use the simulation function provided by Quartus to simulate.
While the basic grammar knowledge is being learned, many examples of simulations in the book are not implemented in Quartus. At this time, you need to learn to use ModelSim.
Learn more about Verilog's advanced programming knowledge and use the software to do some sample programs.
When the last two books recommended above are similar (the content of the intermediate design of the book in the summer of Xia’s book, and the first part of the book ends), you can compose some practical applications on the board. At this time, you can refer to several examples of the DE2 book, or refer to the hardware on the board, to program and verify different parts.
Then, according to your hobbies and professional direction, find a topic to use Verilog to achieve (or find the relevant teachers, see if they have such a direction, you can help to do something), this process needs to learn More knowledge of other aspects in order to make a real application system.
At this time, the resources of the CPLD may not be enough, maybe it should be done with FPGA. In addition, there is a difference between FPGA and CPLD. The application of the two devices is different. This knowledge and experience should be gradually accumulated in the process of learning. In addition, you can learn some SOC knowledge, not just the Nios II.
Continue to learn, continue to learn, and continue to learn - learning is a lifelong matter. It is not a matter of months that you can learn all the skills. More often, you can improve your ability through practice. This is called The practice is true. I want to learn from my sophomore year to the end of my junior year. I can master this skill in two years. The graduation design of my senior year should be able to make my own excellent design.
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