Design of Data Transmission and Pre-FFT Synchronization System of DVB-T Demodulator
Abstract: The overall structure of the DVB-T demodulator is introduced, and a mechanism for data transmission between multiple modules is designed. A pre-FFT synchronization system is also designed, which includes baseband conversion, coarse symbol synchronization, and fractional frequency synchronization .
figure 1
1 Overall system structure
2 Data transmission
It can be seen that the 1-bit address signal crossbar requires 5 four-input AND gates and 1 five-input OR gate, and the bus is calculated according to 32bit data (bidirectional) and 12-bit address. Door, and there is no signal all the way through the two-gate delay. Therefore, from the perspective of implementation scale and signal delay, this multi-way crossbar switch is easy to implement. This module is verified on Altera StraTIsx1S25 FPGA, and its access speed can reach more than 100MHz.
The complex multiplier is implemented using the Cordic algorithm, and the phase accumulator adjusts the phase accumulation step according to the input oscillation frequency, and its output is the phase of the local carrier. One multiplier of the Cordic multiplier is the sampled data, and the other multiplier is the phase of the local carrier. Its two outputs are the result of multiplying the input data and cos and sin, respectively. The output of the multiplier enters the 74-order FIR low-pass described above, and then directly decimates 3 times to obtain a data baseband signal with a rate of 9.14 MS / s.
Picture 7
2.2.1 Coarse symbol synchronization estimation
2.2.2 FFT window position adjustment
ACC is the accumulator. NCO is the data oscillator described in Figure 5.
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