This article mainly talked about the 3V-5V level conversion circuit diagram, the following to learn together:
The left end is connected to a 3.3V CMOS level, which can be an IO port such as STM32, FPGA, etc. The right-side output is a 5V level to achieve a 3.3V to 5V level conversion.
Now analyze the role of the various resistors (the core idea is to hold the transistor at a constant value of 0.7V when Vbe is turned on):
Assuming no R87, then when the high level of US_CH0 is directly applied to the BE of the transistor, where is the voltage of 0.7V?
Assuming there is no R91, when the US_CH0 level state is indeterminate, the default is to output high or low level of Trig? Therefore, R91 acts as a fixed level. At the same time, if there is no R91, just enter "0.7V to turn on the transistor, the threshold voltage is too low, R91 has the effect of raising the threshold voltage (see the analysis of the buzzer in the second section).
However, if you add R91, you have to pay attention: If R91 is too small, the base voltage is similar
Only Vb "0.7V can make US_CH0 high conduction, the above figure Vb = 1.36V
Assuming there is no R83, when the input US_CH0 is high (the transistor is turned on), D5V0 (5V high) is directly added to the CE stage of the transistor, and the transistor of the transistor, the transistor, is easily damaged.
Further analysis of its working mechanism:
When the input is high, the transistor is turned on and the output is clamped at the Vce of the transistor. The result of the circuit test is only 0.1V.
When the input is low, the transistor is not conducting and the output is equivalent to using the 10K resistor to pull up the input of the next stage circuit. The actual test result is 5.0V (no load)
Please note:
For high-current loads, the characteristics of the above circuit will not be very good, so it has been emphasized here - this circuit is only suitable for level conversion of 10 mA to tens of mA load.
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