The configuration of AVR fuses is a more meticulous task, and users often ignore their importance or feel difficult to master.
The following points are provided for the configuration and operation of AVR fuses and related considerations.
In the AVR's device manual, use programmed and unprogrammed to define the state of the fuses for the fuses. "Unprogrammed" indicates that the fuses are "1" (forbidden). "Programmed" indicates the fuses. The status is "0" (allowed). Therefore, the process of configuring a fuse bit is actually "configuring the fuse bit to become unprogrammed state "1" or to become programmed state "0"".
When using the programming tool software that determines the fuse state value by selecting the “&raDIC;†method, please read the software instructions carefully first, and make sure that “&radIC;†means set the fuse state to “0†or “ 1".
Special attention should be paid when using the programming download program in CVAVR. Since the initial state of most of the fuses is defined as "1" when the CVAVR programming download interface is initially opened, do not use the "All" option in its programming menu option. The "All" option at this time will configure the fuse position of the chip with the initial state of the fuse, but in reality it is not always the result of the configuration required by the user. If you want to use the "All" option, you should use "Read->Fuse Bits" to read the actual state of the fuses in the chip before using the "All" option.
Before using the new AVR chip, it is necessary to first check the configuration of its fuses, and then configure the fuses according to actual needs, and record the state of each fuse.
After the AVR chip is encrypted, only the data in the chip's internal Flash and E2PROM cannot be read, and the state of the fuse can still be read but the configuration cannot be modified. The Chip Erase command clears the data in the Flash and E2PROM, and configures the two-bit lock bit status to "11" at the same time and is in the unlocked state. However, the chip erase command does not change the state of other fuses.
The correct operating procedure is to download the running code and data, configure the related fuses, and finally configure the locking bits of the chip when the chip is unlocked. After the chip is locked, if it is found that the fuse is incorrectly configured, you must use the Chip Erase command to clear the data in the chip and unlock it. Then re-download the running code and data, modify the configuration-related fuses, and finally configure the chip's lock bit again.
When using ISP serial mode to download programming, configure the SPIEN fuse to "0". When the chip is shipped from the factory, the status of the SPIEN bit defaults to “0â€, which means that the ISP serial mode is allowed to download data. Only this bit is in the programming state "0" can be downloaded via ISP's SPI port. If this bit is configured as not programmed "1", the ISP serial mode download data is immediately forbidden, and only through the parallel The mode or JTAG programming mode can reset the state of SPIEN to "0" and open the ISP. Normally, the state of SPIEN should be kept as “0â€, allowing ISP programming does not affect the I/O function of its pins. As long as the hardware circuit is designed, pay attention to the ISP interface and its connected devices to perform necessary isolation, such as Use series resistors or open jumpers.
When your system does not use JTAG interface to download programming or real-time online emulation debugging, and the pins of the JTAG interface need to be used as I/O ports, you must set the fuse state of JTAGEN to “1â€. When the chip is shipped from the factory, the status of JTAGEN defaults to “0â€, indicating that the JTAG interface is allowed. The external pins of JTAG cannot be used as I/O ports. When JTAGEN's status is set to "1", the JTAG interface is immediately disabled. At this time, the JTAG can only be set to "0" again through the parallel mode or ISP programming mode to open the JTAG.
Under normal circumstances, do not set the fuse to define the RESET pin as I/O use (such as setting the state of the ATADIS TF FF1 in the ATmega8 fuse to “0â€). This will cause the ISP's download programming to fail because it is programmed in the ISP mode. Before time, the RESET pin needs to be pulled low to put the chip into the reset state first.
When using an AVR chip with an internal RC oscillator, pay special attention to the configuration of the fuse CKSEL. In general, the state of the CKSEL bit at the factory default is to use the internal 1MHz RC oscillator as the system clock source. If you use an external oscillator as your system's clock source, don't forget to configure the CKSEL fuses correctly first, otherwise your entire system will have problems timing. When using an external oscillator (or a clock-specific oscillator) as the system clock source in your design, do not mistakenly configure or incorrectly configure the CKSEL fuse to use an external oscillator (or other Different types of oscillatory sources). Once this happens, the chip cannot be operated using the ISP programming method (because the ISP method requires the system clock of the chip to work and generates a timing control signal), and the chip looks "bad". In this case, use only the removal chip to use the parallel programming mode, or use the JTAG mode (if JTAG is enabled and the JTAG interface is left on the target board) to save. Another solution is to try to add different types of oscillator clock signals on the chip's crystal pins. If the ISP can operate on the chip, configure the CKSEL to use the internal 1MHz RC oscillator as the system's Clock source, and then correctly configure CKSEL according to the actual situation.
When using an IAP-enabled AVR chip, if you do not use the BOOTLOADER function, be careful not to set the BOOTRST fuse to a “0†state. This will cause the chip to not start execution from Flash at 0x0000 on power-up. The state of the BOOTRST bit when the chip is shipped defaults to "1".
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